The present invention relates to analog-to-digital signal conversion, and in particular to dual analog-to-digital converter circuits.
Analog signals generated by various devices such as sensors are very often desired to be converted into corresponding digital signals because of the convenience and accuracy of digital signal processing. An analog-to-digital (A/D) converter is a well-known electronic circuit that receives an analog input signal and produces a digital output signal. Thus, the digital output signal is produced based on samples of the analog input signal taken over time. A/D converters are used to provide sequences of digital code representations of numbers in a chosen number base such that the numbers correspond to the amplitude value of sample portions of the analog signal input waveform with respect to a predetermined reference value.
In some circuits, it is desirable to maintain the peak input voltage of the analog signal at or near the maximum value for the range of input signals accepted by the A/D converter. Thus, the sampled analog input is typically normalized so that as much of the range of the converter is used as possible without overflowing. This normalization insures the quantization step-size is sufficiently small that sampling noise is minimized. The input signal normalization process, which is provided by a well-known Automatic Gain Control (AGC) circuit, requires both a variable gain mechanism to adjust the signal and knowledge of the gain value in downstream processing to compensate for the initial signal adjustment.
The AGC circuit typically monitors the analog input signal to the A/D converter and generates a feedback signal based on the monitored input signal. The feedback signal is provided to an amplifier to control the level of the analog input signal to the A/D converter. This feedback signal attempts to keep the peak voltage level of the analog input signal at or near the full-scale value of the input for the A/D converter.
Conventionally, the feedback signal is generated using analog circuitry. For example, such feedback loops typically include one or more of the following analog control blocks: a log amplifier, a summing amplifier, an integrator, and a differentiator. However, such feedback AGC loops are also known that utilize digital circuitry.
The present invention provides improved analog-to-digital (A/D) conversion by providing an apparatus dual channel analog-to-digital converter circuit and a method of performing dual channel analog-to-digital conversion, in contrast to the prior art devices and methods. The apparatus and method of the present invention extend the dynamic range of an A/D converter circuit and eliminates the need for an Automatic Gain Control circuit and its associated complexity.
According to one aspect of the invention, the apparatus and method of the invention are embodied as a novel dual A/D converter circuit that includes two separate channels coupled to receive a single analog input signal, each of the two channels having a means for converting an analog input signal to a digital signal at respective sample times that are adjustable to be substantially simultaneous; a means for adjusting the gain of the two channels to differ by a predetermined factor; a means for detecting a channel overflow condition in one of the two channels having a higher gain; and a means for merging the two channels into a continuous output stream.
According to another aspect of the invention, the dual A/D converter circuit of the invention includes a means for eliminating signal offset errors in the two channels. The means for eliminating signal offset errors is, for example, a digital subtraction circuit.
According to another aspect of the invention, the means for merging the two channels is operable as a function of a result generated by the channel overflow condition detecting means. Furthermore, the means for merging the two channels is operable to output a result of the channel having lower gain when a channel overflow condition is detected on the channel having higher gain.
According to another aspect of the invention, the means for adjusting the gain of the two channels further comprises an amplifier circuit in each of the two channels.
According to another aspect of the invention, the dual A/D converter circuit of the invention includes a means for matching a result of the channel having higher gain to a result of the channel having lower gain.
According to another aspect of the invention, the dual A/D converter circuit of the invention also includes a means for adjusting placement of a rising edge in a clock circuit portion of one channel in time with respect to a clock circuit portion of another channel so that the sample times of the two channels are substantially simultaneous.
According to another aspect of the invention, the channel overflow condition detecting means further comprises a digital comparator circuit.
According to still another aspect of the invention, the means for merging the two channels further comprises a means for adjusting a data bit position of a result of the channel having lower gain to match a result of the channel having higher gain.
According to yet other aspects of the invention, methods for converting an analog signal to a digital signal are provided. The methods of the invention include, for example, splitting an input analog signal into large and small signal channels; scaling the input signal on the large and small signal channels such that the small signal channel has a higher resolution than the large signal channel; sampling the large and small signal channels using separate analog-to-digital converters; and outputting a result of one of the large and small signal channels as a function of determining whether the small signal channel is valid.
The methods of the invention also include merging a result of the large signal channel with a result of the small signal channel into a merged result; and outputting the merged results.